Patch zend_operators-x32.patch for *General Issues Bug #69693

Patch version 2015-05-25 01:29 UTC

• 2015-05-25 01:29 UTC [diff to current]

Developer: bugs@tmarques.com

diff -Nau /tmp/php-5.5.25/Zend/zend_operators.h Zend/zend_operators.h
--- /tmp/php-5.5.25/Zend/zend_operators.h	2015-05-14 01:02:08.000000000 +0100
+++ Zend/zend_operators.h	2015-05-24 22:53:54.000000000 +0100
@@ -506,8 +506,8 @@
 static zend_always_inline int fast_increment_function(zval *op1)
 {
 	if (EXPECTED(Z_TYPE_P(op1) == IS_LONG)) {
-#if defined(__GNUC__) && defined(__i386__)
-		__asm__(
+#if defined(__GNUC__) && ( defined(__i386__) || ( defined(__x86_64__) && defined(__ILP32__) ) ) /* i386 or un-optimized x32 */
+    __asm__(
 			"incl (%0)\n\t"
 			"jno  0f\n\t"
 			"movl $0x0, (%0)\n\t"
@@ -519,7 +519,7 @@
 			  "n"(IS_DOUBLE),
 			  "n"(ZVAL_OFFSETOF_TYPE)
 			: "cc");
-#elif defined(__GNUC__) && defined(__x86_64__)
+#elif defined(__GNUC__) && defined(__x86_64__) && defined(__LP64__) /* amd64 */
 		__asm__(
 			"incq (%0)\n\t"
 			"jno  0f\n\t"
@@ -549,7 +549,7 @@
 static zend_always_inline int fast_decrement_function(zval *op1)
 {
 	if (EXPECTED(Z_TYPE_P(op1) == IS_LONG)) {
-#if defined(__GNUC__) && defined(__i386__)
+#if defined(__GNUC__) && ( defined(__i386__) || ( defined(__x86_64__) && defined(__ILP32__) ) ) /* i386 or un-optimized x32 */
 		__asm__(
 			"decl (%0)\n\t"
 			"jno  0f\n\t"
@@ -562,7 +562,7 @@
 			  "n"(IS_DOUBLE),
 			  "n"(ZVAL_OFFSETOF_TYPE)
 			: "cc");
-#elif defined(__GNUC__) && defined(__x86_64__)
+#elif defined(__GNUC__) && defined(__x86_64__) && defined(__LP64__) /* amd64 */
 		__asm__(
 			"decq (%0)\n\t"
 			"jno  0f\n\t"
@@ -593,7 +593,7 @@
 {
 	if (EXPECTED(Z_TYPE_P(op1) == IS_LONG)) {
 		if (EXPECTED(Z_TYPE_P(op2) == IS_LONG)) {
-#if defined(__GNUC__) && defined(__i386__)
+#if defined(__GNUC__) && ( defined(__i386__) || ( defined(__x86_64__) && defined(__ILP32__) ) ) // i386 or un-optimized x32
 		__asm__(
 			"movl	(%1), %%eax\n\t"
 			"addl   (%2), %%eax\n\t"
@@ -616,7 +616,7 @@
 			  "n"(IS_DOUBLE),
 			  "n"(ZVAL_OFFSETOF_TYPE)
 			: "eax","cc");
-#elif defined(__GNUC__) && defined(__x86_64__)
+#elif defined(__GNUC__) && defined(__x86_64__) && defined(__LP64__) /* amd64 */
 		__asm__(
 			"movq	(%1), %%rax\n\t"
 			"addq   (%2), %%rax\n\t"
@@ -679,7 +679,7 @@
 {
 	if (EXPECTED(Z_TYPE_P(op1) == IS_LONG)) {
 		if (EXPECTED(Z_TYPE_P(op2) == IS_LONG)) {
-#if defined(__GNUC__) && defined(__i386__)
+#if defined(__GNUC__) && ( defined(__i386__) || ( defined(__x86_64__) && defined(__ILP32__) ) ) /* i386 or un-optimized x32 */
 		__asm__(
 			"movl	(%1), %%eax\n\t"
 			"subl   (%2), %%eax\n\t"
@@ -706,7 +706,7 @@
 			  "n"(IS_DOUBLE),
 			  "n"(ZVAL_OFFSETOF_TYPE)
 			: "eax","cc");
-#elif defined(__GNUC__) && defined(__x86_64__)
+#elif defined(__GNUC__) && defined(__x86_64__) && defined(__LP64__) /* amd64 */
 		__asm__(
 			"movq	(%1), %%rax\n\t"
 			"subq   (%2), %%rax\n\t"